View BD41000FJ-CGE2_8703707.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

product structure : silicon monolithic integrated circuit this product has no designed protection against radioactive ra ys 1/ 19 tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 14 ? 001 cxpi transceiver for automotive bd41000 fj -c general description bd41000 fj -c is a transceiver for the cxpi (clock extension peripheral interface) communication. switching between master/slave mode can be done using external pin (ms pin). low power consumption during standby (non-communication) using power saving mode function. arbitration function stops the data output upon detection of bus data collision. also fail-safe function stops outputs upon detection of under voltage or temperature abnormality. features ? aec -q100 qualified (note1) ? cxpi standards qualified ? transmission speed range from 5kbps to 20kbps ? master/s lav e switching function ? microcontroller interface corresponds to 3.3v/5.0v ? built-in terminator (30k ) ? power saving mode ? data arbitration function ? built-in un d er voltage locko ut (uvlo) function ? built-in thermal shutdown (tsd) function ? low em e(electromagnetic emission) ? high em i(electromagnetic immunity) ? high esd (electrostatic discharge) robustness (note1: grade 1) applications ? automotive networks key specifications ? power supply voltage +7 v to + 18 v ? absolute maximum rating of bat -0.3 v to + 40 v ? absolute maximum rating of bus -27v to + 40v ? power saving mode current 3 a ( typ) ? operating temperature range - 40 c to + 12 5c package w(typ) x d(typ) x h(max) sop-j8 4.90mm x 6.00mm x 1. 65 mm sop- j8 typical application circuit figure 1. typical application circuit bd41000fj-c regulator micro controller (note 1) int clk(3) vdd ms(8) txd(4) rxd(1) nslp(2) gnd(5) bus(6) bat(7) 10k 2.7k(note 2) 2.7k gnd 220pf 100nf bd41000fj-c regulator micro controller (note 1) clk(3) vdd ms(8) txd(4) rxd(1) nslp(2) gnd(5) bus(6) bat(7) 10k 2.7k gnd 1k 1nf 100nf master node cxpi bus vbat note 2 while using slave, it is no problem that clk is opened in the case of non- using clk output. slave node rxd txd clk i/o note 1 int: interrupt, rxd: uart rxd, txd: uart txd, clk: clock, i/o: general pur pose i/o int rxd txd clk i/o datashee t downloaded from: http:///
2/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 pin configuration figure 2 . pin c on figuration pin description table 1. pin description pin no. pin name function 1 rxd received data output pin 2 nslp codec m ode selection input pin ( h coding/decoding, l non-coding/decoding) 3 clk clk input/output pin (master setting: input, slave setting: output) 4 txd transmission data input pin 5 gnd ground 6 bus cxpi bus pin 7 bat power supply pin 8 ms master/slave switching pin ( h : m aster, l : slave) block diagram figure 3. block diagram 1 2 3 4 5 6 7 8 rxd ms nslp clk txd bat bus gnd (top view) bat thermal shutdown (tsd) power on reset (por) oscillator logic bus low pass filter 30k decoder encoder arbiter timing generator slope control gnd rxd txd nslp to each block clk slope timer dominant timeout counter (dtc) wakeup timer controller 8 ms under voltage lockout (uvlo) regulator bat 1 4 2 3 3 6 7 downloaded from: http:///
3/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 description of blocks state transition diagram bd41000fj-c is built- in power off m ode , through m ode , rx through m ode other than codec m ode for power saving control. each mode is controll ed by ns lp , bus, and txd pins . figure 4 . state transition diagram please refer to the following parameter of the electrical charac teristic about (note 1) and (note 2 ). (note 1): wakeup pulse detection lo time , (note 2): wakeup input detection time (txd) while using master, clk becomes input pin, and uses to input bus clock in codec mode power off mode power off m ode reduces power consumption by not supplying powers to any circuits other than necessary ones for wakeup puls e detection (bus) and wakeup input detection (txd) . when txd is h , wa keup input is detected, and then change s to through mode . in the case of shifts to power off m ode , txd is l , and then nslp is l . through m ode and rx through mode cannot change to power off m ode directly. please change via codec m ode with nslp as h . through mode through mode does not process coding/decoding. i t only drives signals from txd to bus and from bus to rxd directly. please change to through mode with txd as h to send wakeup pulse. rx through mode rx through m ode reverses rxd output at each rising edge of bus. please monitor the change of rxd to detect wakeup pulse in power off mode ,. codec mode codec m ode is the mode of cxpi communication. nslp should be h for the chip to enter codec mode . outputs in the case of master setting are changed by the falling edge of clk, and in the case of slave setting are c hanged by the falling edge of bus . bus signal is delayed 2.0 0 .5tbit from txd input , and rxd is delayed 1.0 0 .5 tbit from bus input . the jitter of clk input should satisfy the cxpi standard (1.0 %) including the effect of bd41000fj-c (0.05%) in the ca se of master settin g. power off mode rxd output non-power supply v bat v por when v bat 4/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 sequence diagram it shows the example of bd41000fj- c control sequence ( sleep m ode , standby m ode and normal m ode ) corresponding to the cxpi standard. (please refer to the cxpi standard for specifications about the detail of mode management.) 1. the sequence from normal m ode to sleep mode when changing to sleep mode, nslp should be switched from h to l, and then the ic turns to power o ff mode. txd has built-in pull-down resistor in case of a fail- safe. in sleep mode, set txd to l b efore bd41000fj-c enters power off mode to prevent extra currents from mcu side. set clk to l just like txd, because the pull -down resister of clk is active in the case of master setting. figure 5. the sequence from normal m ode to sleep m ode figure 6. the timing chart from normal mode to sleep m ode (master) micro controller (mcu) sleep condition establish txd (sleep flame) normal mode master node bd41000fj-c sleep flame transmit sleep flame transmit (with coding) sleep flame detect clk output stop txd output control power off indicate clk (l fixed) txd (l output) nslp (l fixed) sleep mode codec mode power off mode bd41000fj-c codec mode slave node micro controller (mcu) sleep flame detect rxd (sleep flame) txd output control power off indicate txd (l output) nslp (l output) sleep mode normal mode power off mode sleep flame transmit (with coding) sleep flame(note 1) bus clock supply stop note 1 please refer to the cxpi standard about sleep f lame. rxd (sleep flame) nslp txd clk rxd bus power off mode operating mode sleep flame transmit sleep flame receive sleep flame codec mode master node tclock_stop_m (note1) note 1 please refer to the cxpi standard about tclock_stop_ m. downloaded from: http:///
5/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 figure 7. the timing chart from normal mode to sleep m ode (slave) 2. the sequence from sleep m ode to normal m ode (master node trigger) to wake up the node by an internal factor, set nslp to h for th e chip to enter codec mode. txd should be h for about 30 s before changing from power off mode to codec mode in order to prevent abnormal outputs of bus or rxd. in the case of slave mode, bd41000fj-c reverses rxd output at eve ry rising edge of bus signal after receiving bus clock. it is better to wake up by the second clock rising edge. to change from standby mode to sleep mode because t he slave node cannot receive the second rising pulse within the specified time, please return to power off mode with nslp as l again a fter the change to codec mode with nslp as h. figure 8. the sequence from s leep mode to normal m ode (master n ode trigger) nslp txd rxd bus power off mode operating mode sleep flame receive sleep flame codec mode slave node tsleep_s (note 2) note 2 please refer to the cxpi standard about tsleep_s . micro controller (mcu) wakeup factor clk (output start) master node bd41000fj-c clk output start txd output control power off reset power off mode bd41000fj-c power off mode slave node micro controller (mcu) wakeup detect wakeup decision txd output control txd (h output) normal mode standby mode codec mode bus clock supply start sleep mode standby mode txd (h output) nslp (h output) clk transmit (with coding) wakeup pulse receive (first pull- up ) rxd (l output) rxd (h output) after that, output reverse by every bus signal pull up edge power off control sleep mode wakeup pulse receive (second pull- up) codec mode normal mode nslp (h output) rx through mode downloaded from: http:///
6/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 figure 9. the timing chart from sleep mode to normal m od e (master node trigger, master) figure 10 . the timing chart from sleep mode to normal m od e (master node trigger, slave) nslp txd clk rxd bus codec mode operating mode power off mode master node within 30s nslp txd rxd bus codec mode operating mode power off mode slave node wakeup pulse (clock signal) clk rx through mode within 30s downloaded from: http:///
7/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 3. the sequence from sleep m ode to normal m ode (slave node trigger) to wake up the slave node by an internal factor, set txd to h for the chi p to enter through mode. after receiving the wakeup pulse in the master node, rxd output re verses at every rising edge of the bus signal. it is better to establish wakeup at clocks first rising edge . to change from standby m ode to sleep mode , in case the master node cannot receive bus clock within the specified time, set nslp to l to return to power off mode then enter to codec mode by setting nslp to h . figure 11 . th e sequence from s leep mode to normal m ode (slave node trigger) figure 12 . the timing chart from sleep m ode to normal m od e (slave n ode trigger, master) micro controller (mcu) master node bd41000fj-c power off mode bd41000fj-c power off mode slave node microcontroller (mcu) normal mode standby mode bus clock supply start sleep mode standby mode clock transmit (there is coding) power off control sleep mode clock receive rx through mode nslp (h output) through mode in the case of it cannot receive clock within the role time, wakeup pulse retransmit wakeup factor txd output control txd (h output) wakeup bd41000fj-c when it exceeds t txd_wakeup wakeup pulse transmit txd (wakeup pulse) wakeup pulse transmit (without coding) wakeup pulse receive wakeup detect clk output start txd output control power off control clk (output start) txd (h output) nslp (h output) clock signal detect rxd(clock signal) codec mode rxd (l output) normal mode codec mode wakeup pulse after that, output reverse at every bus signal rising edge through output nslp txd rxd bus codec mode operation mode power off mode master node clk within 30s rx through mode tclock_start_m (note1) note 1 please refer to the cxpi standard about tclock_start _m. trx_wakeup_master downloaded from: http:///
8/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 figure 13 . the timing chart from sleep mode to normal m od e (slave n ode trigger, slave) transmission and reception start ed effective ti me after shift to codec m ode to detect clock sequence is to learn the lo width of logi c value1 during codec m ode with nslp as h . to keep learning it , please start to transmit and receive data after the time eq ual to 16 t bit clocks at least. (6 tbit clocks are necessary until bus clock is outputted by bus or clk after nslp as h. ) figure 14 . the actual time of transmission and reception after codec mode changing arbitration function bd41000fj- c has built- in function to stop transmission upon detection of bus data coll ision. when the signal is detected on bus before the start of transmit data, bd41000fj-c stops to transmit data of 1uart flame section. figure 15 . arbitration function (when reception is detected before recep tion) nslp txd clk rxd bus codec mode power off mode slave node wakeup pulse ttx_wakeup (note 2) ttx_wakeup (note 2) ttx_wakeup_space (note 3) through mode *2, *3 please refer to the cxpi standard about ttx_wakeup , ttx_wakeup_space t txd_wakeup operation mode bus max 6tbit 16tbit prohibit transmit and receive transmit and receive possible 16tbit prohibit transmit and receive transmit and receive possible max 6tbit power off rx through master nslp master clk slave rxd slave nslp slave clk slave state master state 0 1 0 1 0 0 1 1 1 1 0 stop bus output transmission possible 1 0 1 0 1 0 1 0 start bit stop bit start bit detect signal stop bit transmission impossible start bit transmission possible start bit restart bus output txd bus rxd transmission possible (arbitration) 6.5tbit 2.5tbit downloaded from: http:///
9/ 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 in the case of collision (arbitration defeat) af ter data transmission by other node on bus, it stops the tran smission of re maining uart flame data at the collision. it is necessary to have the interval 1tbit more to transmit again after arbitration defeat . figure 16 . arbitration function (when the collision is detected after data tran smission) fa il-safe m ode bd41000fj- c has built in fail-safe mode such as dtc (txd dominant abnor mal detection circuit) , tsd (abnormal thermal detection circuit) and uvlo/por (abnormal un d er voltage detection circuit ). the operations of each abnormality situation are as follows; table 2. fail-safe functions fail-safe function state transition bus output rxd output clk output (while using slave) dtc abnormality no change codec m ode logical value1 output (note 1) th rough m ode hi -z(h) fixed bus signal output hi -z (h) fixed tsd abnormality no change hi -z (h) fixed hi -z (h) fixed hi -z (h) fixed uvlo abnormality no change hi -z (h) fixed hi -z (h) fixed hi -z (h) fixed por abnormality power off m ode hi -z (h) fixed hi -z (h) fixed hi -z (h) fixed (note 1) in the case of master setting, clk is outputted even if dtc abno rmality is detected in codec mode . when l time of txd is more than t dtc , dtc (dominant timeout counter) detects abnormality, and then it st ops output. i t can retune to normal status with txd as h when the junction temperature exceeds t tsd , tsd (thermal shutdown) circuit detects abnormality, and then i t stops output. it can return to normal status when the temperature drops below t tsd_hys. operations of uvlo (under voltage lockout) and por (power on reset) are as follows; when supply voltage drops below v uvlo , uvlo abnormality is detected, and then bus, rxd and clk output s are fixed hi -z (h) . ( only slave) when power supply exceeds v uvlo , transceiver restarts output. when supply voltage drops belo w v por , por abnormality is detected, and then it changes to power off m ode , and reset status. figure 17 . internal status and m ode by supply voltage 0 1 0 1 1 0 0 1 1 1 1 0 stop bus output transmission possible 1 0 1 0 1 0 1 0 start bit stop bit start bit defeat (txd rxd) stop bit ?? occurring collision transmission impossible start bit transmission possible 0 start bit restart bus output txd bus rxd absolute maxim rating 40v operating guarantee range por activation range bat voltage uvlo activation range power off normal operation uvlo detection state 18v 7v 6.7v 5.0v 0v mode downloaded from: http:///
10 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 absolute maximum ratings (ta = 25c) table 3. absolute maximum ratings (ta = 25c) parameter symbol rating unit supply voltage on pin bat (note 1) v bat -0.3 to +4 0 .0 v ms voltage v ms -0.3 to +40.0 v bus voltage v bus -27.0 to +40.0 v clk , txd , rxd , nslp voltage v mcu -0.3 to +7.0 v power dissipation (note 2) p d 0.67 w storage temperature range t stg - 55 to +150 c junction max temperature t jmax 150 c electro static discharge (hbm) (note 3) v esd 4000 v (note 1) pd , aso should not be exceeded. (note 2) regarding above ta=25c, pd decreased at 5.40mw/ c for temperatures when mounted on 70x70x1.6mm glass-epoxy pcb. (note 3 ) jedec qualified. caution: operating the ic over the absolute maximum ratings may damage t he ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important t o consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. recommended operating conditions table 4 . recommended operating conditions parameter symbol rating unit bat supply voltage range v bat +7 to + 18 v operating temperature range t opr - 40 to + 125 c downloaded from: http:///
11 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 electrical characteristics (unless otherwise specified ta=- 40 c to + 12 5 c , vbat=7v to 18v) table 5. electrical characteristics (1) parameter symbol min typ max unit conditions bat supply current 1 i bat_slp - 3 10 a after nslp shifts from h to l supply current 2 i bat_nor - 3 10 ma nslp=h , ms=h , clk=20khz (duty=50%) txd=10khz (duty=50%) txd , nlsp , clk (when input) vih vih mcu_in 2.0 - - v vil vil mcu_in - - 0.8 v input h current iih mcu_in 6.0 14.0 40.0 a input voltage=5v input l current iil mcu_in -5.0 0.0 5.0 a wakeup input detection time (txd) t txd_wakeup 30 100 150 s h width input clock duty (c lk) duty clk 48 50 95 % duty rule of h width ms vih vih ms_in v bat -1.0 - - v vil vil ms_in - - v bat- 3.0 v input h current iih ms_in -5.0 - 5 .0 a input voltage= v bat =18v input l current iil ms_in -5.0 - 5.0 a in power off m ode rxd , clk (when output) output on current oil mcu_out 1.3 3.5 - ma output p in =0.4v output off current oih mcu_out -5.0 0.0 5.0 a output p in =5 v bus (dc characteristics) recessive output voltage v bus_res v bat x 0.9 - - v r l =500 dominant output voltage 1 v bus_dom_1 - - 1.2 v v bat =7v , r l =500 dominant output voltage 2 v bus_dom_2 0.6 - - v v bat =7v , r l =1k dominant output voltage 3 v bus_dom_3 - - 2.0 v v bat =18v , r l =500 dominant output voltage 4 v bus_dom_4 0.8 - - v v bat =18v , r l =1k h level leakage current iih bus -5.0 0.0 5.0 a when recessive output v bat = v bus =18v pull-up resister r bus 20 30 50 k v bat =12v short-circuit output current iocp bus 40 - 200 ma v bat = v bus =18v r l =0 l current at receiver operating iol bus -1 - - ma v bat =12v , v bus =0v input leakage current at receiver operating il bus - - 20 a v bat =8 v , v bus =18v leakage current when no_gnd il bus_no_gnd -1 - 1 ma gnd=v bat =12v, v bus =0 v to 18 v leakage current when no_bat il bus_no_bat - - 100 a v bat = 0v , v bus =0v to 18 v input h threshold voltage vih bus_rec v bat x 0.556 - - v input l threshold voltage vil bus_dom - - v bat x 0.423 v input threshold voltage (typical) vthc bus v bat x 0.475 v bat x 0.5 v bat x 0.525 v input hysteresis voltage vhys bus - - v bat x 0.133 v downloaded from: http:///
12 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 table 6. electrical characteristics (2) parameter symbol min typ max unit conditions bus (ac characteristics) lo level time 1 of logical value 1 (note 1) t tx_1_lo_rec - - 0.39tbit +0.6 - th _rec =70% lo level time 2 of logical value 1 t tx_1_lo_dom 0.11 - - t bit th _dom =30% hi detection time of receiving t tx_0_hi 0.06 - - t bit th _rec =55.6% difference of lo level time between logical v alue 1 and logical v alue 0 t tx_dif 0.06 - - t bit t tx_dif = t tx_0_lo - t tx_1_lo delay time from the lo level detection to logical v alue 0 output t tx_0_pd - - 0.11 t bit th _dom =30% lo time 1 of logical value 0 t tx_0_lo_rec t tx_1_lo_rec + 0.06 - - t bit th _rec =70% lo time 2 of logical value 0 t tx_0_lo_dom t tx_1_lo_dom + 0.06 - - t bit th _dom =30% bus p ull -down time t tx_1_dom _m - - 0.16 t bit th _dom =30% recessive voltage of logical v alue 0 v _rec _0 93 - - % ratio for the recessive voltage (v _rec_1 ) when logical value is 1 wakeup pulse detection lo time for master setting t rx_wakeup_master 30 100 150 s th _dom =42.3% wakeup pulse detection lo time for slave setting t rx_wakeup_slave 0.5 3 5 s th _dom =42.3% tsd ts d detection temperature (note 2) t tsd 150 - 200 c tsd hysteresis temperature (note 2) t tsd_hys - 14 - c uvlo uvlo detection voltage v uvlo 5.0 - 6.7 v por por detection voltage v por - - 5.0 v dtc dominant time-out time t dtc 9 13 22 ms (note 1) is a fixed number when bus ( 1s 5s ) (note 2) it is a design guarantee parameter, and does not measure the all qu antity at shipment time. figure 18 . bus waves of logical value 1, 0 bus wave logical value 1 v _rec_0 th _rec th _dom t tx_1_dom_m t tx_0_lo_dom t tx_0_lo_rec t tx_0_hi t tx_1_lo_dom t tx_1_lo_rec v _rec_1 th _rec th _dom t tx_dif t bit bus wave logical value 0 downloaded from: http:///
13 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 application example figure 19 . application example of secondary clock master option power dissipation figure 20 . power dissipation (note 1) measured boar d (70mm x 70mm x 1.6mm , g lass epoxy 1-layer) (note 2) these values are changed by number of layer and copper foil ar ea. bd41000fj-c regulator micro controller (note 1) int clk(3) vdd ms(8) txd(4) rxd(1) nslp(2) gnd(5) bus(6) bat(7) 10k 2.7k(note 2) 2.7k gnd 220pf 100nf note 2 while using slave, it is no problem that clk is opened in the case of non- using clk output. slave node (applicable secondary clock master option) rxd txd clk i/o note 1 int: interrupt, rxd: uart rxd, txd: uart txd, clk: clock, i/o: general pur pose i/o cxpi bus vbat i/o 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 25 50 75 100 125 150 power dissipation pd[w] temp ta [ ] 0.67w ja = 85. /w downloaded from: http:///
14 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 i/o equivalent circuits type equivalence circuit type equivalence circuit a output pin: rxd b input pin: nslp , txd c input/output pin: clk d cxpi bus input/output pin: bus e input pin: ms bus bat 1/2 x bat downloaded from: http:///
15 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can dama ge the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an extern al diode between the power supply and the ic s power supply pin s. 2. power supply lines de sign the pcb layout pattern to provide low impedance supply lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the an alog block. furthermore, connect a capacitor to ground at all pow er supply pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capaci tors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground trace s, the two ground traces should be routed separately but connected to a single ground at the reference point of the a pplication board to avoid fluctuations in the small-si gnal ground caused by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thi ck as possible to reduce line impedance. 5. thermal consideration should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. in cas e of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the maximum junction temperature rating. 6. recommended operating conditions these conditions represent a range within which the expec ted characteristics of the ic can be approximately obtained . the electrical characteristics are guaranteed under the condi tions of each parameter. 7. inrush current when power is first supplied to the ic, it is possible that the internal logic may be unstable and inrush current may fl ow instantaneously due to the internal powering sequence a nd delays, especially if the ic has more than one power supply. therefore, give special consideration to power coup ling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagneti c f ield operating the ic in the presence of a strong electromagnetic field m ay cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subjec t the ic to stress. always discharge capacitors completely af ter each process or step. the ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when mounti ng the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground, power supply and output pin . inter-pin shorts could be due to many reasons such as m etal particles, water droplets (in very humid environment) an d unintentional solder bridge deposited in between pins durin g assembly to name a few. 11. unused input pins input pins of an ic are often connected to the gate of a mos tran sistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the electric field from the outside can easily charge it. the small charge acquired in this way is enough to produce a signi ficant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise spe cified, unused input pins should be connected to the power supply or ground line. downloaded from: http:///
16 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 operational notes C continued 12. regarding the i nput pin of the ic this monolithic ic contains p+ isolation and p substrate lay ers between adjacent elements in order to keep them isolated. p- n junctions are formed at the intersection of the p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a paras itic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physica l damage. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd vol tage to an input pin (and thus to the p substrate) should b e avoided. figure 20 . example of monolithic ic structure 13. ceramic capacitor when using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to dc bias and others. 14. area of safe operation (aso) operate the ic such that the output voltage, output current, and th e maximum junction temperature rating are all within the area of safe operation (aso). 15. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that preven ts heat damage to the ic. normal operation should always be within the ics maximum junction temperature rating. if however the rating is exceeded for a continued per iod, the junction temperature (tj) will rise which will activate the tsd circuit that will turn off all output pins. when the tj falls below the tsd threshold, the circuits are automatically restored to n ormal operation. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set desi gn or for any purpose other than protecting the ic from heat damage. n n p + p n n p + p substrate gnd n p + n n p + n p p substrate gnd gnd parasitic elements pin a pin a pin b pin b b c e parasitic elements gnd parasitic elements c be transistor (npn) resistor n region close-by parasitic elements downloaded from: http:///
17 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 ordering information b d 4 1 0 0 0 f j c g e 2 part number package fj: sop- j8 product rank c: for automotive g: halogen free packaging and forming specification e2: embossed tape and reel marking diagrams part number marking package orderable part number 41000 sop- j8 bd 41000 fj-cg e2 sop-j8 (top view) 41000 part number marking lot number 1pin mark downloaded from: http:///
18 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 physical dimension, tape and reel information package name sop-j8 downloaded from: http:///
19 / 19 bd41000fj-c tsz02201-0e2e0 h5 00140-1-2 ? 2015 rohm co., ltd. all rights reserved. 2015.12.15 rev.001 www.rohm.com tsz22111 ? 15 ? 001 revision history date revision changes 15 .dec.2014 001 new release downloaded from: http:///
notice-paa-e rev.003 ? 201 5 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. if you intend to use our products in devices requiring extreme ly high reliability (such as medical equipment (note 1) , aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life , bodily injury or serious damage to property ( specific applications ), please consult with the rohm sales representative in advance. unless otherwise agreed in writin g by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any rohm s products for specific applications. (note1) medical equipment classification of the specific applic ations japan usa eu china class class class b class class class 2. rohm designs and manufactures its products subject to stri ct quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adeq uate safety measures including but not limited to fail-safe desig n against the physical injury, damage to any property, whic h a failure or malfunction of our products may cause. the followi ng are examples of safety measures: [a] installation of protection circuits or other protective devic es to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are no t designed under any special or extraordinary environments or conditions, as exemplified below . accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or c onditions (as exemplified below), your independent verification and confirmation of product performance, reliabil ity, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, including water, oils, chemicals, and organi c solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products are e xposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed t o static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing component s, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subject to radiation-proof design. 5. please verify and confirm characteristics of the final or mou nted products in using the products. 6 . in particular, if a transient load (a large amount of load appl ied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mou nting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating u nder steady-state loading condition may negatively affec t product performance and reliability. 7. de -rate power dissipation depending on ambient temperature. wh en used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8 . confirm that operation temperature is within the specified range desc ribed in the product specification. 9 . rohm shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc .) flux is used, the residue of flux may negatively affect prod uct performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method mus t be used on a through hole mount products. i f the flow soldering method is preferred on a surface-mount p roducts, please consult with th e rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
notice-paa-e rev.003 ? 201 5 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, p lease allow a sufficient margin considering variations o f the characteristics of the products and external components, inc luding transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and a ssociated data and information contain ed in this document are presented only as guidance for products use. therefore, i n case you use such information, you are solely responsible for it and you must exercise your own independ ent verification and judgment in the use of such information contained in this document. rohm shall not be in any way respon sible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such informat ion. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take p roper caution in your manufacturing process and storage so t hat voltage exceeding the products maximum rating will not be applied to products. please take special care under dry co ndition (e.g. grounding of human body / equipment / solder iro n, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate if the products are stored in the places where: [a] the products are exposed to sea winds or corrosive gases, in cluding cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderabil ity of products out of recommended storage time period may be degraded. it is strongly recommended to confirm so lderability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indi cated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humi dity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage tim e period. precaution for product label a two-dimensional barcode printed on rohm products label is f or rohm s internal use only. precaution for disposition when disposing products please dispose them properly usi ng an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to appl ication example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, a ctions or demands arising from the combination of the products with other articles such as components, circuits, systems or ex ternal equipment (including software). 3. no license, expressly or implied, is granted hereby under any inte llectual property rights or other rights of rohm or any third parties with respect to the products or the information contai ned in this document. provided, however, that rohm will not assert its intellectual property rights or other rights a gainst you or your customers to the extent necessary to manufacture or sell products containing the products, subject to th e terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whole or in p art, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified , reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any way whatsoever the pr oducts and the related technical information contained in the products or this document for any military purposes, includi ng but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

▲Up To Search▲

Price & Availability of BD41000FJ-CGE2

	To Download BD41000FJ-CGE2 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .